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9. Supported CPUs

9.1 MIPS32 architecture

All CPUs and cores that conform to the MIPS32 specification, including the MIPS 4K series, Alchemy Au1000/1500.

9.2 MIPS64 architecture

All CPUs and cores that conform to the MIPS64 specification, including the MIPS 5K and 10K series, Sibyte SB1 core / SB1250 SOC.

9.3 R2000, R3000 family

Linux supports the R2000, R3000 family and many processors that were derived from these the two original MIPS processors such as the R3081.

9.4 R4000 family

Linux supports many of the members of the R4000 family. Currently, these are: R4000PC, R4400PC, R4300, R4600, R4700.

Not supported are the R4000MC and R4400MC CPUs (that is multiprocessor systems), as well as R5000 systems with a CPU-controlled second level cache. This means that the cache is controlled by the R5000 itself, in contrast to some external cache controller. The difference is important because, unlike other systems, especially PCs, on MIPS the cache is architecturally visible and needs to be controlled by software.

Special credit goes to Ulf Carlsson (ulfc@engr.sgi.com) who provided the CPU module for debugging the R4000SC / R4400SC support.

There is some confusion about version numbering of R4000 and R4400 CPUs on SGI systems. These two processor types are basically identical with the main difference being the R4000 only having primary caches of each 8kb while the R4400 has twice that. Consequently these two processors do identify themselves both as type 4 in the c0_PrId register but a different version number while marketing decieded to market the somewhat improved R4400 as a great and new product. R4000 processors have version numbers upto 3.0; R4400 processors do identify themselves as version 4.0 and newer. As a consequence of the R4400 being sold as new product they also started counting the marketing version numbers again at 1.0. The IRIX hinv command uses the hardware version numbers while Linux in the hope to minimize the confusion is using marketing's version numbers that is the Linux version numbers are consistent with those used by the the MIPS literature such as processor errata.

9.5 R5000 family

The R5000 and many similar family members such R5230 and R5260 are supported by Linux. Support include support for the internal second level cache controller as well as the external cache controllers used by the SGI IP22.

9.6 R6000

Sometimes people confuse the R6000, a MIPS processor, with RS6000, a series of workstations made by IBM. So, if you're reading this in hope of finding out more about Linux on IBM machines, then you're reading the wrong document.

The R6000 is currently not supported. It is a 32-bit MIPS ISA 2 processor; apretty interesting and weird piece of silicon. It was developed and produced by a company named BIT Technology. Later, NEC took over the semiconductor production. It was built using ECL technology, the same technology that was, and still is, being used to build extremely fast chips like those used in some Cray computers. The processor had its TLB implemented as part of the last couple of lines of the external primary cache, a technology called TLB slice. That means its MMU is substantially different from those of the R3000 or R4000 series, which is also one of the reasons why the processor isn't supported.

9.7 RM7000 family

The RM7000 and some similar family members are supported by Linux including support for tertiary caches.

9.8 R8000

The R8000 is currently unsupported partly because this processor is relatively rare and has only been used in a few SGI machines, and partly because the Linux/MIPS developers don't have such a machine.

The R8000 is a pretty interesting piece of silicon. Unlike the other members of the MIPS family it is a set of seven chips. It's cache and TLB architecture are pretty different from the other members of the MIPS family. It was born as a quick hack to get the floating point crown back to Silicon Graphics before the R10000 is finished.

9.9 R10000

The R10000 is supported as part of the mips64 kernel which currently is supported on the IP22 (SGI Indy, Challenge S and Indigo 2) and Origin.

Due to the very hard-to-handle way this processor works in non-cachecoherent systems, it will probably be some time until we support this processor in such systems. As of today, these systems are the SGI O2 and Indigo 

9.10 Processors without TLB

For embedded purposes, there are special derivates of the above CPU available which often lack a full TLB. We don't support those types nor should you ever expect such support to be added.

Hackers may want to take a look at a Linux subset named Microcontroller Linux, or short, ucLinux. This would be supportable on TLB-less processors. Given the little difference between CPU types with and without TLB, we still recommend that you choose a processor with TLB. It's going to save you a lot of engineering.

9.11 Processors with partial or no FPU

Linux/MIPS version 2.4 and later feature a full FPU emulation and therefore can support these processors while maintaining the full binary compatibility to fpu-full versions.


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